Patents on CMOS technology test structures and circuit design tools
Assignee: IBM Corp. (Armonk, NY)
US Patent # 8589842
Title: Device-based random variability modelling in timing analysis
Inventors: Bhushan M, Fluhr E, Sinha D, Shuma S, Visweswariah C, Warnock JD, Wood MH
US Patent # 9110777
Title: Reducing performance degradation in backup semiconductor chips
Inventors: Bansal A, Bhushan M, Jenkins KA, Kim J, Linder B, Zhao K
US Patent # 8723528
Title: An active 2-dimensional array structure for parallel testing
Inventors: Bhushan M, Ketchen MB
US Patent # 8456169
Title: High speed measurement of random variation/yield in integrated circuit device testing
Inventors: Bhushan M, Ketchen MB, Liang Q, Maciejewski EP
US Patent # 8310269
Title: Measurement of partially depleted silicon-on-insulator CMOS circuit leakage current under different steady state switching conditions
Inventors: Bhushan M, Ketchen MB
US Patent # 8248094
Title: Acquisition of silicon-on-insulator switching history effects statistics
Inventors: Bhushan M, Ketchen MB
US Patents # 8179120, # 9194909, # 9075109
Two additional patents with same title and complementary claims subsequently filed, Pub App # 20120166898 and 20120161807
Title: Single level of metal test structure for differential timing and variability measurements of integrated circuits
Inventors: Bhushan M, Ketchen MB, Kim C
US Patent # 8027797
Title: Methods and apparatus for determining a switching history time constant in an integrated circuit device
Inventors: Bhushan M, Ketchen MB, Pearson DJ
US Patent # 7595654
Title: Methods and apparatus for inline variability measurement of integrated circuit components
Inventors: Bhushan M, Gettings KM, Haensch W, Ji BL, Ketchen MB
US Patent # 7583125
Title: Methods and apparatus for pulse generation used in characterizing electronic fuses
Inventors: Bhushan M, Ketchen MB, Kothandaraman C, Maciejewski EP
US Patent # 7512509
Title: M1 testable addressable array for device parameter characterization
Inventors: Bhushan M, Ketchen MB
US Patent # 7504896
Title: Methods and apparatus for inline measurement of switching delay history effects in PD-SOI technology
Inventors: Bhushan M, Ketchen MB
US Patent # 7504875
Title: Methods and apparatus for characterizing electronic fuses used to personalize an integrated circuit
Inventors: Bhushan M, Ketchen MB, Kothandaraman C, Maciejewski EP
US Patent # 7355902
Title: Methods and apparatus for inline characterization of high speed operating margins of a storage element
Inventors: Bhushan M, Ketchen MB
US Patent # 7342406
Title: Methods and apparatus for inline variability measurement of integrated circuit components
Inventors: Bhushan M, Gettings KM, Haensch W, Ji BL, Ketchen MB
US Patent # 7295057
Title: Methods and apparatus for characterizing electronic fuses used to personalize an integrated circuit
Inventors: Bhushan M, Ketchen MB, Kothandaraman C, Maciejewski EP
US Patent # 7265639
Title: Methods and apparatus for ring oscillator based MOSFET gate capacitance measurements
Inventors: Bhushan M, Ketchen MB
US Patent # 7190233
Title: Methods and apparatus for measuring change in performance of ring oscillator circuit
Inventors: Bhushan M, Ketchen MB
US Patent # 7176695
Title: Method and apparatus for measuring transfer characteristics of a semiconductor device
Inventors: Bhushan M, Ketchen MB
US Patent # 7145347
Title: Method and apparatus for measuring transfer characteristics of a semiconductor device
Inventors: Bhushan M, Ketchen MB
US Patent # 7085658
Title: Method and apparatus for rapid inline measurement of parameter spreads and defects in integrated circuit chips
Inventors: Bhushan M, Ketchen MB
US Patent # 7069525
Title: Method and apparatus for determining characteristics of MOS devices
Inventors: Bhushan M, Ketchen MB
US Patent # 6960926
Title: Method and apparatus for characterizing a circuit with multiple inputs
Inventors: Anderson CJ, Bhushan M, Ketchen MB
US Patent # 6798261
Title: Method and apparatus for characterizing switching history impact
Inventors: Bhushan M, Ketchen MB, Pearson D
Patents on photovoltaic devices
Assignee: The University of Delaware (Newark, DE)
US Patent # 4443653
Title: Thin film photovoltaic device with multilayer substrate
Inventors: Catalano AW, Bhushan M
US Patent # 4342879
Title: Thin film photovoltaic device
Inventors: Catalano AW, Bhushan M